Vacancy caducado!
- This is an individual contributor role where the candidate will be tasked with driving the RTL design and performance/power optimization of various sub-blocks of the memory controller for the mobile market as well as other custom SoC markets.
- Architectural as well as RTL design experience is critical for success.
- Engage with other architects within the IP and at the SoC level to drive the architectural definition
- Partner with the physical design team to resolve implementation level details
- Work closely with design verification to test plan and otherwise ensure proper functionality
- Produce quality RTL on schedule meeting PPA goals
- Deliver quality micro-architectural level documentation
- Expect to collaborate with engineers in Korea on requirements
- Interact with GPU and other key IP to produce a good system-level solution
- BSEE, Computer Engineer or comparable and 3 + years of experience
- Demonstrated experience of successful Architectural through RTL design experience on various sub-blocks of high performance digital designs
- Experience with DRAM technologies: LPDDR4/5, DDR4/5, or similar
- Lower power design experience
Vacancy caducado!