New College Grad, VLSI Design Engineer (BS & MS, Summer 2025 start)

Western Digital is seeking a New College Graduate to join the Memory Technology Design team team in Milpitas, CA. The candidate will be responsible for designing, developing, modifying, and evaluating Chip architecture and Core/Data Path/Analog circuit structures for feasibility study of high-performance NAND flash, including new, highly advanced 3D NAND memories. Evaluation of these circuits will be done through HSPICE, FINESIM and VERILOG simulations and through silicon probing when the silicon arrives.ESSENTIAL DUTIES AND RESPONSIBILITIES:Architect and design circuits at transistor level and gate level for leading-edge 3D NAND flash memory, including page buffers, sense amplifiers and high-speed data path circuit design.RTL design for page buffer and data path control logics and verification in Verilog, RTL linting, clock domain crossing (CDC) analysis, synthesis, timing analysis and closure.Perform block level and full chip circuit simulations to meet all performance specifications.Conduct silicon debugging and evaluation with micro-probing. Collaborate with characterization engineers to fully characterize silicon, and collaborate with other designers to develop solutions for silicon issues.Generate detailed technical reports and presentations.The candidate should have a specialization in circuit design and professional or academic experience in circuit design. The candidate’s skillset should include a problem-solving mindset, good project management skills, strong verbal and written communication, and the ability to thrive in a team environment.