Vacancy caducado!
Client., a semiconductor company headquartered in the heart of California’s Silicon Valley, is a leader in purpose-built connectivity solutions for data-centric systems throughout the data center. Partnering with leading processor vendors, cloud service providers, seasoned investors, and world-class manufacturing companies, client is helping customers remove performance bottlenecks in data-intensive systems that are limiting the true potential of applications such as artificial intelligence and machine learning. The company’s product portfolio includes system-aware semiconductor integrated circuits, boards, and services to enable robust CXL, PCIe, and Ethernet connectivity.
- Strong academic and technical background in electrical engineering.
- At minimum, a Bachelor’s in EE is required, Master’s is preferred.
- Minimum of 5 years’ experience working with FAEs/customers to design in complex SoC/silicon products with a PCIe interface
- Entrepreneurial, open-mind behavior and can-do attitude. Think and act with the customer in mind!
- Strong working knowledge of PCIe LTSSM at a physical layer level, associated standards, and debug.
- Most recent experience with PCIe 4.0 at a minimum, some experience with 5.0/CXL preferred.
- Silicon/System bring-up and debug experience in customer systems.
- Firsthand experience with lab equipment such as protocol analyzers/exercisers, high-speed oscilloscopes, or BERTs.
- Technical writing skills to generate clear, precise documentation including application notes and similar guides for internal and customer-facing audiences.
Vacancy caducado!