Vacancy caducado!
- Writing & maintaining test plans
- Creating and maintaining UVM test benches
- Created a module test bench from scratch
- Written Cover points, Assertions (SVA), and closed coverage
- BS/MS in EE/CE,
- 5+ years of Design Verification experience
- Familiarity with ASIC, Computer, and Embedded Systems Architectures
- Knowledge of standard bus protocols such as AHB, AXI, etc.
- Scripting and test automation for regression
- Experience with PCIe/NVMe and/or ONFI
- Experience with SSD architecture
- Unlimited PTO
- Dental, Medical, Vision
- 401K
- Other full-time benefits
Vacancy caducado!