Job Details

ID #51170791
Estado California
Ciudad Folsom
Full-time
Salario USD TBD TBD
Fuente Intel
Showed 2024-03-03
Fecha 2024-03-03
Fecha tope 2024-05-02
Categoría Etcétera
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GPU Physical Design Engineer

California, Folsom, 95630 Folsom USA
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Job DescriptionDo Something Wonderful!Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow.Who we are:We are a Physical Design execution team in the Client Graphics and AI organization responsible for design implementation, verification and tape-out of next generation, industry-leading Graphics/AI products for Intel. We cover all aspects of planning, implementation, optimization and verification at all design hierarchies and end to end from RTL to final product tape-out.In this position, candidate will be part of a team implementing Integrated and Discrete Graphics blocks on leading edge process technology and EDA tools. The team is responsible for all SoC level physical design & optimization flows ranging from Floorplanning, Synthesis through GDS and parallel verification aspects such as Static Timing Analysis, Formal Verification, EM/IR/PDN aspects, Layout Verification etc. The ideal candidate will be responsible for development/ implementation and execution of a range of flows on a given design block for Intel graphics projects. The responsibilities may also include defining product requirements such as frequency, operating voltages, etc., coming up with new methodologies/ implementing them and validating them to tackle new challenges presented by the new technologies/ processes/ architectures. The candidate would be required to work closely with the Architecture, Design and rest of the project team members to resolve issues which arise during GPU development and design cycle and take the key learnings into the next product cycle. Good interpersonal/communication skills are necessary due to the nature of work, size/complexity of products and the size of the team.Behavior skills we are looking for:

Good communication and interpersonal skills

Strong team player with the ability to work with a large, international team

Ability to work independently and take full responsibility of assigned tasks

QualificationsYou must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:Bachelor's degree in Electrical/Computer Engineering, or related STEM degree, with 5+ years relevant work orMaster's degree in Electrical/Computer Engineering, or related STEM degree with 3+ years relevant work experience in:

Logic Design/VLSI/ASIC Design/Architecture

Experience in one or more of ASIC style design flows: floorplanning, synthesis, place/route, layout verification, static timing analysis, formal/layout verification - flows/processes

Preferred Qualifications:

Knowledge of SoC integration aspects such as floorplan/timing integration of a variety of RLS blocks

Experience with any of the industry tools in these areas will be an added plus

Knowledge and Experience with Unix/Linux, Perl and TCL in order to implement useable, flexible C Shell/Perl/Tcl programs that automate tool/flow methodologies

Inside this Business GroupThe Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.Other LocationsUS, TX, Austin; US, AZ, Phoenix; US, CA, Santa ClaraPosting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)Annual Salary Range for jobs which could be performed in US, California: $144,501.00-$217,311.00Salary range dependent on a number of factors including location and experienceWorking ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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