Sr Director, ASIC Engineering

Your CareerWe are looking for a Senior Director of ASIC Engineering to manage and lead a high performing ASIC and FPGA development team.  The successful candidate will be responsible for the overall development and production of complex digital ASICs and FPGAs used in next-generation firewall products.  In addition to being directly responsible for the design, verification and vendor interface teams, you will partner closely with the System Architecture,  System Hardware, and Software teams to deliver on aggressive feature, performance, cost and schedule targets of Palo Alto Networks’ ASICs and FPGAs.The ideal candidate will be a consensus driven leader with management and leadership experience in small to large size organizations, with comprehensive system and silicon development experience, and a proven track record of first-pass success in ASIC, FPGA and Systems.Your ImpactThe Director of ASIC/FPGA will lead a team of ASIC and FPGA engineers and own the development activity of Palo Alto Networks ASIC and FPGAsThe responsibilities include leading a world class ASIC/FPGA team, and driving a state of the art ASIC/FPGA methodology to enable solid execution of the digital ASIC and FPGAsThe Director will interface with peers in System Architecture, Hardware, Software and Operations to ensure that Palo Alto Networks will execute and deliver highly differentiated systems that are market winners