RTL Designer/Architect, CPU Floating Point Unit

California, Mountainview

Vacancy caducado!

RTL Designer/Architect, CPU Floating Point Unit Seeking RTL designer to architect floating-point units (FPU). Write microarchitecture specification, with block and timing diagram, write some RTL. Work with design verification to verify design. Define floating point data paths implementing the IEEE 754 standard while achieving very aggressive performance, clock and low power goals. Implement integer SIMD and floating point SIMD data paths focusing on power/performance. Work with architecture teams and other micro architects to define high performance floating point issue, register, bypass and retirement logic to support a complex FP-SIMD ISA. Participate in discussions around future architectural extensions and improvements in related areas.

Minimum qualifications: 5 years of experience in floating point datapath design. Experience with data path design techniques required to achieve high clock rates. Experience in design techniques to minimize data path power usage.

Preferred qualifications: Knowledge of a Floating Point and SIMD ISA used by a modern high performance microprocessor. Expert knowledge of the IEEE 754 standard. Thorough understanding of IEEE 754 datapath implementations including design, verification and physical implementation issues. Yoh, a Day & Zimmermann company, is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.Visit

https://www.yoh.com/applicants-with-disabilities to contact us if you are an individual with a disability and require accommodation in the application process.

Suscribir Reportar trabajo